O.k. ... that makes it clear what you mean.
In future versions of QET, such splices will have to be built in to make clear, in which way the cabling has to be done. However, this must be an automatic feature in the software when you make your connections between the terminals.
With the “Splice” or “ThruSomething” elements, you insert non-existent parts into your circuit diagram, which appear as empty lines in the bill of materials.
These “elements” also make my life quite difficult:
For some time now (not full time!) I am trying to develop a software-tool that automatically extracts a cabling plan from the QET schematic file. However, these “elements” are not allowed to appear in a cabling plan because they are not real components!
Not only these parts make it quite difficult to create such a diagram automatically - also the many possibilities to use references in circuit diagrams is quite complex...
But that's another topic!
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